Update compiler toolchain to 3.2.0

[earlephilhower]

Includes compiler updates from @jjsuwa-sys3175

[jjsuwa-sys3175]

Thanks for building the toolchain :)

For the time being, regression tests have been done when merging to gcc mainline, so it shouldn't be completely unusable...

I checked the build of "fsbrowser" and the actual chip operation check for each patch submission.

Notable changes:

• Preliminary -mlra option added (not ready for use yet)
• Always save register A0 (function return address) to stack when -Og is specified, even for leaf functions
• Improved register allocation efficiency by removing RA tweak remnants that no longer worked
• Related to the above, the order of register allocation has changed
• Once register A0 has been saved to the stack in the function prologue, the compiler may assign register A0 to variables or intermediate values in the function body
• Improved inefficiency in automatic char array initialization.

  /* example */
  void test(void) {
    char buffer[32] = { 0, 0, 0, 0, 0, };
    asm volatile("" : : "m"(buffer));
  }
  
  ;; before
  .LC0:
  	.string	""
  	.string	""
  	.string	""
  	.string	""
  	.string	""
  	.string	""
  	.zero	26
  	.literal_position
  	.literal .LC1, .LC0
  test:
  	addi	sp, sp, -48
  	l32r	a3, .LC1
  	movi.n	a4, 6
  	mov.n	a2, sp
  	s32i.n	a0, sp, 44
  	call0	memcpy
  	addi.n	a2, sp, 6
  	addi	a3, sp, 32
  	movi.n	a4, 0
  .L2:
  	s16i	a4, a2, 0
  	addi.n	a2, a2, 2
  	bne	a2, a3, .L2
  	l32i.n	a0, sp, 44
  	addi	sp, sp, 48
  	ret.n
  
  ;; after
  test:
  	addi	sp, sp, -32
  	mov.n	a9, sp
  	addi	a10, sp, 32
  	movi.n	a11, 0
  .L2:
  	s32i.n	a11, a9, 0
  	addi.n	a9, a9, 4
  	bne	a9, a10, .L2
  	addi	sp, sp, 32
  	ret.n
  

[earlephilhower]

I've run about a dozen examples (LittleFS, WiFi, HTTPClient, Arduino core, WebServer) and had no issues, so I think this is good to go whenever you guys want to update the toolchain.

[TD-er]

Is LTO also supported with this updated toolchain?
If not, what is needed to support it?
On my ESP32 builds, it makes a difference of roughly 5 - 7% in binary size. (with debug symbols still included)

[earlephilhower]

Not supported. If I remember correctly many years ago igrr tried LTO and had serious issues with the way it handled weak functions.

This is just the latest patches back ported from the upstream GCC later versions with some size and speed optimizations.

[TD-er]

with some size and speed optimizations.

OK, fair enough. Let's hope those size optimizations are already helping out then...