diff --git a/.editorconfig b/.editorconfig index c9b76fd6..c7bf2228 100644 --- a/.editorconfig +++ b/.editorconfig @@ -5,6 +5,9 @@ indent_style = space indent_size = 2 trim_trailing_whitespace = true +[*.md] +trim_trailing_whitespace = false + [*.sh] # like -i=2 indent_style = space diff --git a/.github/workflows/codespell.yml b/.github/workflows/codespell.yml index 5ea11f42..744a6d2e 100644 --- a/.github/workflows/codespell.yml +++ b/.github/workflows/codespell.yml @@ -24,4 +24,5 @@ jobs: check_hidden: true # In the event of a false positive, add the word in all lower case to this file: # ignore_words_file: ./extras/codespell-ignore-words-list.txt - path: src + skip: src/utility/STM32Cube_FW + path: src diff --git a/README.md b/README.md index 3a0691ab..2413f5c2 100644 --- a/README.md +++ b/README.md @@ -1,16 +1,21 @@ # STM32duinoBLE -This library is a fork of ArduinoBLE library to add the support of SPBTLE-RF and SPBTLE-1S BLE modules. -It was successfully tested with the X-NUCLEO-IDB05A2 or X-NUCLEO-IDB05A1 or X-NUCLEO-BNRG2A1 expansion board and a NUCLEO-F401RE -or NUCLEO-L476RG or NUCLEO-L053R8, with B-L475E-IOT01A and with STEVAL-MKSBOX1V1. -In order to use this library with STEVAL-MKSBOX1V1, you need to update the firmware of the SPBTLE-1S BLE module -mounted on that board as described in the following wiki page: - +This library is a fork of ArduinoBLE library to add the support of STM32WBxx, SPBTLE-RF and SPBTLE-1S BLE modules. +It was successfully tested with the P-NUCELO_WB55RG, STM32WB5MM-DK, X-NUCLEO-IDB05A2 or X-NUCLEO-IDB05A1 or +X-NUCLEO-BNRG2A1 expansion board and a NUCLEO-F401RE or NUCLEO-L476RG or NUCLEO-L053R8, with B-L475E-IOT01A +and with STEVAL-MKSBOX1V1. + + - In order to use this library with SM32WBxx series, you need to update the STM32WB Copro Wireless Binaries +with stm32wbxx_BLE_HCILayer_fw.bin depending of your mcu: +https://github.com/STMicroelectronics/STM32CubeWB/tree/master/Projects/STM32WB_Copro_Wireless_Binaries + Each subdirectories contains binaries and Release_Notes.html which explain how to update it. + + - In order to use this library with STEVAL-MKSBOX1V1, you need to update the firmware of the SPBTLE-1S BLE module +mounted on that board as described in the following wiki page: https://github.com/stm32duino/wiki/wiki/STM32duinoBLE#stm32duinoble-with-steval_mksbox1v1 -In order to use this library with X-NUCLEO-BNRG2A1, you need to update the firmware of the BLUENRG-M2SP BLE module -mounted on that expansion board as described in the following wiki page: - +- In order to use this library with X-NUCLEO-BNRG2A1, you need to update the firmware of the BLUENRG-M2SP BLE module +mounted on that expansion board as described in the following wiki page: https://github.com/stm32duino/wiki/wiki/STM32duinoBLE#stm32duinoble-with-x-nucleo-bnrg2a1 For more information about ArduinoBLE library please visit the official web page at: diff --git a/src/utility/HCISharedMemTransport.cpp b/src/utility/HCISharedMemTransport.cpp index e8c422c9..e51b5fa6 100644 --- a/src/utility/HCISharedMemTransport.cpp +++ b/src/utility/HCISharedMemTransport.cpp @@ -644,7 +644,7 @@ int HCISharedMemTransportClass::stm32wb_start_ble(void) CFG_BLE_MAX_ATT_MTU, CFG_BLE_SLAVE_SCA, CFG_BLE_MASTER_SCA, - CFG_BLE_LSE_SOURCE, + CFG_BLE_LS_SOURCE, CFG_BLE_MAX_CONN_EVENT_LENGTH, CFG_BLE_HSE_STARTUP_TIME, CFG_BLE_VITERBI_MODE, @@ -654,11 +654,11 @@ int HCISharedMemTransportClass::stm32wb_start_ble(void) CFG_BLE_MIN_TX_POWER, CFG_BLE_MAX_TX_POWER, CFG_BLE_RX_MODEL_CONFIG, - CFG_BLE_MAX_ADV_SET_NBR, - CFG_BLE_MAX_ADV_DATA_LEN, - CFG_BLE_TX_PATH_COMPENS, - CFG_BLE_RX_PATH_COMPENS - + CFG_BLE_MAX_ADV_SET_NBR, + CFG_BLE_MAX_ADV_DATA_LEN, + CFG_BLE_TX_PATH_COMPENS, + CFG_BLE_RX_PATH_COMPENS, + CFG_BLE_CORE_VERSION }; /** * Starts the BLE Stack on CPU2 diff --git a/src/utility/STM32Cube_FW/README.md b/src/utility/STM32Cube_FW/README.md index c9af001e..69041d4c 100644 --- a/src/utility/STM32Cube_FW/README.md +++ b/src/utility/STM32Cube_FW/README.md @@ -1,6 +1,6 @@ ## Source -[STMicroelectronics/STM32CubeWB Release v1.14.0](https://github.com/STMicroelectronics/STM32CubeWB/releases/tag/v1.14.0) -- Application: [BLE_TransparentMode](https://github.com/STMicroelectronics/STM32CubeWB/tree/v1.14.0/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_TransparentMode) +[STMicroelectronics/STM32CubeWB Release vv1.15.0](https://github.com/STMicroelectronics/STM32CubeWB/releases/tag/vv1.15.0) +- Application: [BLE_TransparentMode](https://github.com/STMicroelectronics/STM32CubeWB/tree/vv1.15.0/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_TransparentMode) diff --git a/src/utility/STM32Cube_FW/app_conf_default.h b/src/utility/STM32Cube_FW/app_conf_default.h index 91672ac9..57f1027e 100644 --- a/src/utility/STM32Cube_FW/app_conf_default.h +++ b/src/utility/STM32Cube_FW/app_conf_default.h @@ -42,7 +42,7 @@ * Define Tx Power */ #ifndef CFG_TX_POWER - #define CFG_TX_POWER (0x18) /* -0.15dBm */ + #define CFG_TX_POWER (0x18) /* -0.15dBm */ #endif /****************************************************************************** @@ -80,7 +80,7 @@ * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ #ifndef CFG_BLE_MAX_ATT_MTU - #define CFG_BLE_MAX_ATT_MTU (156) + #define CFG_BLE_MAX_ATT_MTU (156) #endif /** @@ -104,7 +104,7 @@ */ // #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) #ifndef CFG_BLE_PREPARE_WRITE_LIST_SIZE - #define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) + #define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) #endif /** @@ -118,14 +118,14 @@ * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. */ #ifndef CFG_BLE_DATA_LENGTH_EXTENSION - #define CFG_BLE_DATA_LENGTH_EXTENSION 1 + #define CFG_BLE_DATA_LENGTH_EXTENSION 1 #endif /** * Sleep clock accuracy in Slave mode (ppm value) */ #ifndef CFG_BLE_SLAVE_SCA - #define CFG_BLE_SLAVE_SCA 500 + #define CFG_BLE_SLAVE_SCA 500 #endif /** @@ -140,20 +140,21 @@ * 7 : 0 ppm to 20 ppm */ #ifndef CFG_BLE_MASTER_SCA - #define CFG_BLE_MASTER_SCA 0 + #define CFG_BLE_MASTER_SCA 0 #endif /** * LsSource * Some information for Low speed clock mapped in bits field * - bit 0: 1: Calibration for the RF system wakeup clock source 0: No calibration for the RF system wakeup clock source - * - bit 1: 1: STM32W5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module + * - bit 1: 1: STM32WB5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module + * - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config */ -#ifndef CFG_BLE_LSE_SOURCE +#ifndef CFG_BLE_LS_SOURCE #if defined(STM32WB5Mxx) - #define CFG_BLE_LSE_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LSE_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LSE_MOD5MM_DEV) + #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) #else - #define CFG_BLE_LSE_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LSE_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LSE_OTHER_DEV) + #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) #endif #endif @@ -161,14 +162,14 @@ * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us) */ #ifndef CFG_BLE_HSE_STARTUP_TIME - #define CFG_BLE_HSE_STARTUP_TIME 0x148 + #define CFG_BLE_HSE_STARTUP_TIME 0x148 #endif /** * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us) */ #ifndef CFG_BLE_MAX_CONN_EVENT_LENGTH - #define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) + #define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) #endif /** @@ -190,8 +191,16 @@ * - SHCI_C2_BLE_INIT_OPTIONS_NO_EXT_ADV * - SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 * - SHCI_C2_BLE_INIT_OPTIONS_NO_CS_ALGO2 + * - SHCI_C2_BLE_INIT_OPTIONS_REDUC_GATTDB_NVM + * - SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM + * - SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_USED + * - SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_1 * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3 + * - SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_WRITABLE + * - SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_READONLY + * - SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_SUPPORTED + * - SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_NOTSUPPORTED * which are used to set following configuration bits: * (bit 0): 1: LL only * 0: LL + host @@ -203,8 +212,16 @@ * 0: extended advertizing not supported * (bit 4): 1: CS Algo #2 supported * 0: CS Algo #2 not supported + * (bit 5): 1: Reduced GATT database in NVM + * 0: Full GATT database in NVM + * (bit 6): 1: GATT caching is used + * 0: GATT caching is not used * (bit 7): 1: LE Power Class 1 * 0: LE Power Class 2-3 + * (bit 8): 1: appearance Writable + * 0: appearance Read-Only + * (bit 9): 1: Enhanced ATT supported + * 0: Enhanced ATT not supported * other bits: reserved (shall be set to 0) */ #define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY) @@ -257,5 +274,12 @@ #define CFG_BLE_RX_PATH_COMPENS (0) -#endif /* APP_CONF_DEFAULT_H */ + /* BLE core version (16-bit signed integer). + * - SHCI_C2_BLE_INIT_BLE_CORE_5_2 + * - SHCI_C2_BLE_INIT_BLE_CORE_5_3 + * which are used to set: 11(5.2), 12(5.3). + */ + +#define CFG_BLE_CORE_VERSION (SHCI_C2_BLE_INIT_BLE_CORE_5_3) +#endif /* APP_CONF_DEFAULT_H */ diff --git a/src/utility/STM32Cube_FW/ble_bufsize.h b/src/utility/STM32Cube_FW/ble_bufsize.h index 247573be..cea5da84 100644 --- a/src/utility/STM32Cube_FW/ble_bufsize.h +++ b/src/utility/STM32Cube_FW/ble_bufsize.h @@ -84,7 +84,7 @@ /* * BLE_FIXED_BUFFER_SIZE_BYTES: - * A part of the RAM, is dynamically allocated by initializing all the pointers + * A part of the RAM, is dynamically allocated by initializing all the pointers * defined in a global context variable "mem_alloc_ctx_p". * This initialization is made in the Dynamic_allocator functions, which * assign a portion of RAM given by the external application to the above @@ -92,39 +92,39 @@ * * The size of this Dynamic RAM is made of 2 main components: * - a part that is parameters-dependent (num of links, GATT buffers, ...), - * and which value is defined by the following macro; + * and which value is made explicit by the following macro; * - a part, that may be considered "fixed", i.e. independent from the above * mentioned parameters. */ #if (BEACON_ONLY != 0) -#define BLE_FIXED_BUFFER_SIZE_BYTES 4076 /* Beacon only */ +#define BLE_FIXED_BUFFER_SIZE_BYTES 4092 /* Beacon only */ #elif (LL_ONLY_BASIC != 0) -#define BLE_FIXED_BUFFER_SIZE_BYTES 5692 /* LL only Basic*/ +#define BLE_FIXED_BUFFER_SIZE_BYTES 5788 /* LL only Basic*/ #elif (LL_ONLY != 0) -#define BLE_FIXED_BUFFER_SIZE_BYTES 5940 /* LL only Full */ +#define BLE_FIXED_BUFFER_SIZE_BYTES 6036 /* LL only Full */ #elif (SLAVE_ONLY != 0) -#define BLE_FIXED_BUFFER_SIZE_BYTES 6204 /* Peripheral only */ +#define BLE_FIXED_BUFFER_SIZE_BYTES 6292 /* Peripheral only */ #elif (BASIC_FEATURES != 0) -#define BLE_FIXED_BUFFER_SIZE_BYTES 6532 /* Basic Features */ +#define BLE_FIXED_BUFFER_SIZE_BYTES 6624 /* Basic Features */ #else -#define BLE_FIXED_BUFFER_SIZE_BYTES 7056 /* Full stack */ +#define BLE_FIXED_BUFFER_SIZE_BYTES 7144 /* Full stack */ #endif /* * BLE_PER_LINK_SIZE_BYTES: additional memory size used per link */ #if (BEACON_ONLY != 0) -#define BLE_PER_LINK_SIZE_BYTES 128 /* Beacon only */ +#define BLE_PER_LINK_SIZE_BYTES 112 /* Beacon only */ #elif (LL_ONLY_BASIC != 0) -#define BLE_PER_LINK_SIZE_BYTES 260 /* LL only Basic */ +#define BLE_PER_LINK_SIZE_BYTES 244 /* LL only Basic */ #elif (LL_ONLY != 0) -#define BLE_PER_LINK_SIZE_BYTES 260 /* LL only Full */ +#define BLE_PER_LINK_SIZE_BYTES 244 /* LL only Full */ #elif (SLAVE_ONLY != 0) -#define BLE_PER_LINK_SIZE_BYTES 392 /* Peripheral only */ +#define BLE_PER_LINK_SIZE_BYTES 336 /* Peripheral only */ #elif (BASIC_FEATURES != 0) -#define BLE_PER_LINK_SIZE_BYTES 440 /* Basic Features */ +#define BLE_PER_LINK_SIZE_BYTES 412 /* Basic Features */ #else -#define BLE_PER_LINK_SIZE_BYTES 444 /* Full stack */ +#define BLE_PER_LINK_SIZE_BYTES 424 /* Full stack */ #endif /* @@ -155,7 +155,7 @@ * Valid values are from 31 to 1650. */ #define BLE_EXT_ADV_BUFFER_SIZE(set_nbr, data_len) \ - (2304 + ((892 + (DIVC(data_len, 207) * 244)) * (set_nbr))) + (2512 + ((892 + (DIVC(data_len, 207) * 244)) * (set_nbr))) /* * BLE_TOTAL_BUFFER_SIZE_GATT: this macro returns the amount of memory, diff --git a/src/utility/STM32Cube_FW/hw_ipcc.c b/src/utility/STM32Cube_FW/hw_ipcc.c index 7b9be81a..0c1868f6 100644 --- a/src/utility/STM32Cube_FW/hw_ipcc.c +++ b/src/utility/STM32Cube_FW/hw_ipcc.c @@ -1,4 +1,3 @@ -/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file hw_ipcc.c @@ -16,7 +15,6 @@ * ****************************************************************************** */ -/* USER CODE END Header */ #if defined(STM32WBxx) /* Includes ------------------------------------------------------------------*/ @@ -62,7 +60,7 @@ static void HW_IPCC_LLD_BLE_ReceiveM0CmdHandler( void ); /****************************************************************************** * INTERRUPT HANDLER ******************************************************************************/ -void IPCC_C1_RX_IRQHandler(void) +void IPCC_C1_RX_IRQHandler( void ) { if (HW_IPCC_RX_PENDING( HW_IPCC_SYSTEM_EVENT_CHANNEL )) { @@ -108,7 +106,7 @@ void IPCC_C1_RX_IRQHandler(void) } } -void IPCC_C1_TX_IRQHandler(void) +void IPCC_C1_TX_IRQHandler( void ) { if (HW_IPCC_TX_PENDING( HW_IPCC_SYSTEM_CMD_RSP_CHANNEL )) { @@ -132,7 +130,6 @@ void IPCC_C1_TX_IRQHandler(void) HW_IPCC_BLE_AclDataEvtHandler(); } } - /****************************************************************************** * GENERAL ******************************************************************************/ @@ -163,8 +160,6 @@ void HW_IPCC_Enable( void ) __SEV( ); /* Set the internal event flag and send an event to the CPU2 */ __WFE( ); /* Clear the internal event flag */ LL_PWR_EnableBootC2( ); - - return; } void HW_IPCC_Init( void ) @@ -176,8 +171,6 @@ void HW_IPCC_Init( void ) HAL_NVIC_EnableIRQ(IPCC_C1_RX_IRQn); HAL_NVIC_EnableIRQ(IPCC_C1_TX_IRQn); - - return; } /****************************************************************************** @@ -186,15 +179,11 @@ void HW_IPCC_Init( void ) void HW_IPCC_BLE_Init( void ) { LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_EVENT_CHANNEL ); - - return; } void HW_IPCC_BLE_SendCmd( void ) { LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_BLE_CMD_CHANNEL ); - - return; } static void HW_IPCC_BLE_EvtHandler( void ) @@ -202,16 +191,12 @@ static void HW_IPCC_BLE_EvtHandler( void ) HW_IPCC_BLE_RxEvtNot(); LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_BLE_EVENT_CHANNEL ); - - return; } void HW_IPCC_BLE_SendAclData( void ) { LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL ); LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL ); - - return; } static void HW_IPCC_BLE_AclDataEvtHandler( void ) @@ -219,12 +204,10 @@ static void HW_IPCC_BLE_AclDataEvtHandler( void ) LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL ); HW_IPCC_BLE_AclDataAckNot(); - - return; } -__WEAK void HW_IPCC_BLE_AclDataAckNot( void ){}; -__WEAK void HW_IPCC_BLE_RxEvtNot( void ){}; +__weak void HW_IPCC_BLE_AclDataAckNot( void ){}; +__weak void HW_IPCC_BLE_RxEvtNot( void ){}; /****************************************************************************** * SYSTEM @@ -232,16 +215,12 @@ __WEAK void HW_IPCC_BLE_RxEvtNot( void ){}; void HW_IPCC_SYS_Init( void ) { LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL ); - - return; } void HW_IPCC_SYS_SendCmd( void ) { LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ); LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ); - - return; } static void HW_IPCC_SYS_CmdEvtHandler( void ) @@ -249,8 +228,6 @@ static void HW_IPCC_SYS_CmdEvtHandler( void ) LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ); HW_IPCC_SYS_CmdEvtNot(); - - return; } static void HW_IPCC_SYS_EvtHandler( void ) @@ -258,12 +235,10 @@ static void HW_IPCC_SYS_EvtHandler( void ) HW_IPCC_SYS_EvtNot(); LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL ); - - return; } -__WEAK void HW_IPCC_SYS_CmdEvtNot( void ){}; -__WEAK void HW_IPCC_SYS_EvtNot( void ){}; +__weak void HW_IPCC_SYS_CmdEvtNot( void ){}; +__weak void HW_IPCC_SYS_EvtNot( void ){}; /****************************************************************************** * THREAD @@ -304,8 +279,6 @@ void HW_IPCC_THREAD_CliSendAck( void ) { LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ); LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ); - - return; } static void HW_IPCC_OT_CmdEvtHandler( void ) @@ -313,8 +286,6 @@ static void HW_IPCC_OT_CmdEvtHandler( void ) LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL ); HW_IPCC_OT_CmdEvtNot(); - - return; } static void HW_IPCC_THREAD_NotEvtHandler( void ) @@ -322,8 +293,6 @@ static void HW_IPCC_THREAD_NotEvtHandler( void ) LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL ); HW_IPCC_THREAD_EvtNot(); - - return; } static void HW_IPCC_THREAD_CliNotEvtHandler( void ) @@ -331,13 +300,11 @@ static void HW_IPCC_THREAD_CliNotEvtHandler( void ) LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ); HW_IPCC_THREAD_CliEvtNot(); - - return; } -__WEAK void HW_IPCC_OT_CmdEvtNot( void ){}; -__WEAK void HW_IPCC_CLI_CmdEvtNot( void ){}; -__WEAK void HW_IPCC_THREAD_EvtNot( void ){}; +__weak void HW_IPCC_OT_CmdEvtNot( void ){}; +__weak void HW_IPCC_CLI_CmdEvtNot( void ){}; +__weak void HW_IPCC_THREAD_EvtNot( void ){}; #endif /* THREAD_WB */ @@ -349,7 +316,6 @@ void HW_IPCC_LLDTESTS_Init( void ) { LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ); LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ); - return; } void HW_IPCC_LLDTESTS_SendCliCmd( void ) @@ -362,28 +328,24 @@ static void HW_IPCC_LLDTESTS_ReceiveCliRspHandler( void ) { LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ); HW_IPCC_LLDTESTS_ReceiveCliRsp(); - return; } void HW_IPCC_LLDTESTS_SendCliRspAck( void ) { LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ); LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ); - return; } static void HW_IPCC_LLDTESTS_ReceiveM0CmdHandler( void ) { LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ); HW_IPCC_LLDTESTS_ReceiveM0Cmd(); - return; } void HW_IPCC_LLDTESTS_SendM0CmdAck( void ) { LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ); LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ); - return; } __weak void HW_IPCC_LLDTESTS_ReceiveCliRsp( void ){}; __weak void HW_IPCC_LLDTESTS_ReceiveM0Cmd( void ){}; @@ -397,13 +359,11 @@ void HW_IPCC_LLD_BLE_Init( void ) { LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL ); LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ); - return; } void HW_IPCC_LLD_BLE_SendCliCmd( void ) { LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_LLD_BLE_CLI_CMD_CHANNEL ); - return; } /*static void HW_IPCC_LLD_BLE_ReceiveCliRspHandler( void ) @@ -417,21 +377,18 @@ void HW_IPCC_LLD_BLE_SendCliRspAck( void ) { LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLD_BLE_CLI_RSP_CHANNEL ); LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_CLI_RSP_CHANNEL ); - return; } static void HW_IPCC_LLD_BLE_ReceiveM0CmdHandler( void ) { //LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ); HW_IPCC_LLD_BLE_ReceiveM0Cmd(); - return; } void HW_IPCC_LLD_BLE_SendM0CmdAck( void ) { LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ); //LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ); - return; } __weak void HW_IPCC_LLD_BLE_ReceiveCliRsp( void ){}; __weak void HW_IPCC_LLD_BLE_ReceiveM0Cmd( void ){}; @@ -440,21 +397,18 @@ __weak void HW_IPCC_LLD_BLE_ReceiveM0Cmd( void ){}; void HW_IPCC_LLD_BLE_SendCmd( void ) { LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_LLD_BLE_CMD_CHANNEL ); - return; } static void HW_IPCC_LLD_BLE_ReceiveRspHandler( void ) { LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL ); HW_IPCC_LLD_BLE_ReceiveRsp(); - return; } void HW_IPCC_LLD_BLE_SendRspAck( void ) { LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL ); LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL ); - return; } #endif /* LLD_BLE_WB */ @@ -475,8 +429,6 @@ void HW_IPCC_MM_SendFreeBuf( void (*cb)( void ) ) LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ); } - - return; } static void HW_IPCC_MM_FreeBufHandler( void ) @@ -486,8 +438,6 @@ static void HW_IPCC_MM_FreeBufHandler( void ) FreeBufCb(); LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ); - - return; } /****************************************************************************** @@ -505,9 +455,7 @@ static void HW_IPCC_TRACES_EvtHandler( void ) HW_IPCC_TRACES_EvtNot(); LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_TRACES_CHANNEL ); - - return; } -__WEAK void HW_IPCC_TRACES_EvtNot( void ){}; +__weak void HW_IPCC_TRACES_EvtNot( void ){}; #endif /* STM32WBxx */ diff --git a/src/utility/STM32Cube_FW/shci.h b/src/utility/STM32Cube_FW/shci.h index 040baced..a0f1e4d2 100644 --- a/src/utility/STM32Cube_FW/shci.h +++ b/src/utility/STM32Cube_FW/shci.h @@ -101,7 +101,7 @@ extern "C" { /** * SHCI_SUB_EVT_THREAD_NVM_RAM_UPDATE - * This notifies the CPU1 which part of the 'OT NVM RAM' has been updated so that only the modified + * This notifies the CPU1 which part of the OT NVM RAM has been updated so that only the modified * section could be written in Flash/NVM * StartAddress : Start address of the section that has been modified * Size : Size (in bytes) of the section that has been modified @@ -433,7 +433,7 @@ extern "C" { * PrWriteListSize * NOTE: This parameter is ignored by the CPU2 when the parameter "Options" is set to "LL_only" ( see Options description in that structure ) * - * Maximum number of supported �prepare write request� + * Maximum number of supported "prepare write request" * - Min value: given by the macro DEFAULT_PREP_WRITE_LIST_SIZE * - Max value: a value higher than the minimum required can be specified, but it is not recommended */ @@ -492,6 +492,7 @@ extern "C" { * Some information for Low speed clock mapped in bits field * - bit 0: 1: Calibration for the RF system wakeup clock source 0: No calibration for the RF system wakeup clock source * - bit 1: 1: STM32W5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module + * - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config */ uint8_t LsSource; @@ -499,7 +500,7 @@ extern "C" { * MaxConnEventLength * This parameter determines the maximum duration of a slave connection event. When this duration is reached the slave closes * the current connections event (whatever is the CE_length parameter specified by the master in HCI_CREATE_CONNECTION HCI command), - * expressed in units of 625/256 �s (~2.44 �s) + * expressed in units of 625/256 µs (~2.44 µs) * - Min value: 0 (if 0 is specified, the master and slave perform only a single TX-RX exchange per connection event) * - Max value: 1638400 (4000 ms). A higher value can be specified (max 0xFFFFFFFF) but results in a maximum connection time * of 4000 ms as specified. In this case the parameter is not applied, and the predicted CE length calculated on slave is not shortened @@ -508,7 +509,7 @@ extern "C" { /** * HsStartupTime - * Startup time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 �s (~2.44 �s). + * Startup time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 µs (~2.44 µs). * - Min value: 0 * - Max value: 820 (~2 ms). A higher value can be specified, but the value that implemented in stack is forced to ~2 ms */ @@ -529,7 +530,11 @@ extern "C" { * - bit 2: 1: device name Read-Only 0: device name R/W * - bit 3: 1: extended advertizing supported 0: extended advertizing not supported * - bit 4: 1: CS Algo #2 supported 0: CS Algo #2 not supported - * - bit 7: 1: LE Power Class 1 0: LE Power Classes 2-3 + * - bit 5: 1: Reduced GATT database in NVM 0: Full GATT database in NVM + * - bit 6: 1: GATT caching is used 0: GATT caching is not used + * - bit 7: 1: LE Power Class 1 0: LE Power Classe 2-3 + * - bit 8: 1: appearance Writable 0: appearance Read-Only + * - bit 9: 1: Enhanced ATT supported 0: Enhanced ATT not supported * - other bits: reserved ( shall be set to 0) */ uint8_t Options; @@ -591,6 +596,11 @@ extern "C" { */ int16_t rx_path_compens; + /* BLE core specification version (8-bit unsigned integer). + * values as: 11(5.2), 12(5.3) + */ + uint8_t ble_core_version; + } SHCI_C2_Ble_Init_Cmd_Param_t; typedef PACKED_STRUCT{ @@ -618,22 +628,42 @@ extern "C" { #define SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 (1<<4) #define SHCI_C2_BLE_INIT_OPTIONS_NO_CS_ALGO2 (0<<4) +#define SHCI_C2_BLE_INIT_OPTIONS_REDUC_GATTDB_NVM (1<<5) +#define SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM (0<<5) + +#define SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_USED (1<<6) +#define SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED (0<<6) + #define SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_1 (1<<7) #define SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3 (0<<7) +#define SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_WRITABLE (1<<8) +#define SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_READONLY (0<<8) + +#define SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_SUPPORTED (1<<9) +#define SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_NOTSUPPORTED (0<<9) + /** * RX models configuration */ #define SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY (0<<0) #define SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_BLOCKER (1<<0) + /** + * BLE core version + */ +#define SHCI_C2_BLE_INIT_BLE_CORE_5_2 11 +#define SHCI_C2_BLE_INIT_BLE_CORE_5_3 12 + /** * LsSource information */ -#define SHCI_C2_BLE_INIT_CFG_BLE_LSE_NOCALIB (0<<0) -#define SHCI_C2_BLE_INIT_CFG_BLE_LSE_CALIB (1<<0) -#define SHCI_C2_BLE_INIT_CFG_BLE_LSE_OTHER_DEV (0<<1) -#define SHCI_C2_BLE_INIT_CFG_BLE_LSE_MOD5MM_DEV (1<<1) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB (0<<0) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_CALIB (1<<0) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV (0<<1) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV (1<<1) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE (0<<2) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_HSE_1024 (1<<2) #define SHCI_OPCODE_C2_THREAD_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_THREAD_INIT) /** No command parameters */ @@ -784,6 +814,7 @@ extern "C" { uint32_t BleNvmRamAddress; uint32_t ThreadNvmRamAddress; uint16_t RevisionID; + uint16_t DeviceID; } SHCI_C2_CONFIG_Cmd_Param_t; #define SHCI_OPCODE_C2_802_15_4_DEINIT (( SHCI_OGF << 10) + SHCI_OCF_C2_802_15_4_DEINIT) @@ -801,6 +832,12 @@ extern "C" { #define SHCI_C2_CONFIG_CUT2_1 (0x2001) #define SHCI_C2_CONFIG_CUT2_2 (0x2003) +/** + * Device ID + */ +#define SHCI_C2_CONFIG_STM32WB55xx (0x495) +#define SHCI_C2_CONFIG_STM32WB15xx (0x494) + /** * Config1 * Each definition below may be added together to build the Config1 value @@ -1173,7 +1210,7 @@ typedef struct { /** * SHCI_GetWirelessFwInfo - * @brief This function read back the information relative to the wireless binary loaded. + * @brief This function read back the informations relative to the wireless binary loaded. * Refer yourself to MB_WirelessFwInfoTable_t structure to get the significance * of the different parameters returned. * @param pWirelessInfo : Pointer to WirelessFwInfo_t. diff --git a/src/utility/STM32Cube_FW/shci_tl.c b/src/utility/STM32Cube_FW/shci_tl.c index 678de84d..1abd1be9 100644 --- a/src/utility/STM32Cube_FW/shci_tl.c +++ b/src/utility/STM32Cube_FW/shci_tl.c @@ -20,11 +20,10 @@ /* Includes ------------------------------------------------------------------*/ #include "stm32_wpan_common.h" -#include - #include "stm_list.h" #include "shci_tl.h" #include "stm32_def.h" +#include "wiring_time.h" /* Private typedef -----------------------------------------------------------*/ typedef enum @@ -73,8 +72,6 @@ void shci_init(void(* UserEvtRx)(void* pData), void* pConf) shci_register_io_bus (&shciContext.io); TlInit((TL_CmdPacket_t *)(((SHCI_TL_HciInitConf_t *)pConf)->p_cmdbuffer)); - - return; } void shci_user_evt_proc(void) @@ -130,8 +127,6 @@ void shci_user_evt_proc(void) shci_notify_asynch_evt((void*) &SHciAsynchEventQueue); } - - return; } void shci_resume_flow( void ) @@ -143,8 +138,6 @@ void shci_resume_flow( void ) * be called */ shci_notify_asynch_evt((void*) &SHciAsynchEventQueue); - - return; } void shci_send( uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t * p_cmd_payload, TL_EvtPacket_t * p_rsp ) @@ -167,8 +160,6 @@ void shci_send( uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t * p_cmd_payl memcpy( &(p_rsp->evtserial), pCmdBuffer, ((TL_EvtSerial_t*)pCmdBuffer)->evt.plen + TL_EVT_HDR_SIZE ); Cmd_SetStatus(SHCI_TL_CmdAvailable); - - return; } void shci_notify_asynch_evt(void *pdata) @@ -207,8 +198,6 @@ static void TlInit( TL_CmdPacket_t * p_cmdbuffer ) Conf.IoBusCallBackUserEvt = TlUserEvtReceived; shciContext.io.Init(&Conf); } - - return; } static void Cmd_SetStatus(SHCI_TL_CmdStatus_t shcicmdstatus) @@ -229,24 +218,18 @@ static void Cmd_SetStatus(SHCI_TL_CmdStatus_t shcicmdstatus) StatusNotCallBackFunction( SHCI_TL_CmdAvailable ); } } - - return; } static void TlCmdEvtReceived(TL_EvtPacket_t *shcievt) { (void)(shcievt); shci_cmd_resp_release(0); /**< Notify the application the Cmd response has been received */ - - return; } static void TlUserEvtReceived(TL_EvtPacket_t *shcievt) { LST_insert_tail(&SHciAsynchEventQueue, (tListNode *)shcievt); shci_notify_asynch_evt((void*) &SHciAsynchEventQueue); /**< Notify the application a full HCI event has been received */ - - return; } /* Weak implementation ----------------------------------------------------------------*/ @@ -258,7 +241,6 @@ __WEAK void shci_cmd_resp_wait(uint32_t timeout) break; } } - return; } __WEAK void shci_cmd_resp_release(uint32_t flag) @@ -266,8 +248,5 @@ __WEAK void shci_cmd_resp_release(uint32_t flag) (void)flag; CmdRspStatusFlag = SHCI_TL_CMD_RESP_RELEASE; - - return; } - #endif /* STM32WBxx */ diff --git a/src/utility/STM32Cube_FW/stm_list.c b/src/utility/STM32Cube_FW/stm_list.c index 77dec64f..98924414 100644 --- a/src/utility/STM32Cube_FW/stm_list.c +++ b/src/utility/STM32Cube_FW/stm_list.c @@ -42,11 +42,11 @@ bool LST_is_empty (tListNode * listHead) __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ if(listHead->next == listHead) { - return_value = TRUE; + return_value = true; } else { - return_value = FALSE; + return_value = false; } __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ diff --git a/src/utility/STM32Cube_FW/tl.h b/src/utility/STM32Cube_FW/tl.h index 678769cb..982bb586 100644 --- a/src/utility/STM32Cube_FW/tl.h +++ b/src/utility/STM32Cube_FW/tl.h @@ -84,29 +84,32 @@ typedef PACKED_STRUCT } TL_CsEvt_t; /** - * This the payload of TL_Evt_t for a command complete event + * This the payload of TL_Evt_t for a command complete event, only used a pointer */ typedef PACKED_STRUCT { uint8_t numcmd; uint16_t cmdcode; - uint8_t payload[1]; + uint8_t payload[255]; } TL_CcEvt_t; /** - * This the payload of TL_Evt_t for an asynchronous event + * This the payload of TL_Evt_t for an asynchronous event, only used a pointer */ typedef PACKED_STRUCT { uint16_t subevtcode; - uint8_t payload[1]; + uint8_t payload[255]; } TL_AsynchEvt_t; +/** + * This the payload of TL_Evt_t, only used a pointer + */ typedef PACKED_STRUCT { uint8_t evtcode; uint8_t plen; - uint8_t payload[1]; + uint8_t payload[255]; } TL_Evt_t; typedef PACKED_STRUCT