11/*
2- Copyright (c) 2011 Arduino. All right reserved.
3-
4- This library is free software; you can redistribute it and/or
5- modify it under the terms of the GNU Lesser General Public
6- License as published by the Free Software Foundation; either
7- version 2.1 of the License, or (at your option) any later version.
8-
9- This library is distributed in the hope that it will be useful,
10- but WITHOUT ANY WARRANTY; without even the implied warranty of
11- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12- See the GNU Lesser General Public License for more details.
13-
14- You should have received a copy of the GNU Lesser General Public
15- License along with this library; if not, write to the Free Software
16- Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
2+ *******************************************************************************
3+ * Copyright (c) 2017, STMicroelectronics
4+ * All rights reserved.
5+ *
6+ * Redistribution and use in source and binary forms, with or without
7+ * modification, are permitted provided that the following conditions are met:
8+ *
9+ * 1. Redistributions of source code must retain the above copyright notice,
10+ * this list of conditions and the following disclaimer.
11+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12+ * this list of conditions and the following disclaimer in the documentation
13+ * and/or other materials provided with the distribution.
14+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
15+ * may be used to endorse or promote products derived from this software
16+ * without specific prior written permission.
17+ *
18+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28+ *******************************************************************************
1729*/
1830
1931#include " pins_arduino.h"
@@ -117,40 +129,38 @@ extern "C" {
117129#endif
118130
119131/* *
120- * @brief System Clock Configuration
121- * The system Clock is configured as follow :
122- * System Clock source = PLL (HSE)
123- * SYSCLK(Hz) = 168000000
124- * HCLK(Hz) = 168000000
125- * AHB Prescaler = 1
126- * APB1 Prescaler = 4
127- * APB2 Prescaler = 2
128- * HSE Frequency(Hz) = 8000000
129- * PLL_M = 8
130- * PLL_N = 336
131- * PLL_P = 2
132- * PLL_Q = 7
133- * VDD(V) = 3.3
134- * Main regulator output voltage = Scale1 mode
135- * Flash Latency(WS) = 5
136- * @param None
137- * @retval None
138- */
132+ * @brief System Clock Configuration
133+ * The system Clock is configured as follow :
134+ * System Clock source = PLL (HSE)
135+ * SYSCLK(Hz) = 168000000
136+ * HCLK(Hz) = 168000000
137+ * AHB Prescaler = 1
138+ * APB1 Prescaler = 4
139+ * APB2 Prescaler = 2
140+ * HSE Frequency(Hz) = 8000000
141+ * PLL_M = 8
142+ * PLL_N = 336
143+ * PLL_P = 2
144+ * PLL_Q = 7
145+ * VDD(V) = 3.3
146+ * Main regulator output voltage = Scale1 mode
147+ * Flash Latency(WS) = 5
148+ * @param None
149+ * @retval None
150+ */
139151WEAK void SystemClock_Config (void )
140152{
141153 RCC_ClkInitTypeDef RCC_ClkInitStruct;
142154 RCC_OscInitTypeDef RCC_OscInitStruct;
143155
144-
145- /* Enable Power Control clock */
156+ /* *Configure the main internal regulator output voltage
157+ */
146158 __HAL_RCC_PWR_CLK_ENABLE ();
147159
148- #ifdef HAL_PWR_MODULE_ENABLED
149160 /* The voltage scaling allows optimizing the power consumption when the device is
150- clocked below the maximum system frequency, to update the voltage scaling value
151- regarding system frequency refer to product datasheet. */
161+ clocked below the maximum system frequency, to update the voltage scaling value
162+ regarding system frequency refer to product datasheet. */
152163 __HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE1);
153- #endif
154164
155165 /* Enable HSE Oscillator and activate PLL with HSE as source */
156166 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
@@ -161,23 +171,25 @@ WEAK void SystemClock_Config(void)
161171 RCC_OscInitStruct.PLL .PLLN = 336 ;
162172 RCC_OscInitStruct.PLL .PLLP = RCC_PLLP_DIV2;
163173 RCC_OscInitStruct.PLL .PLLQ = 7 ;
164- HAL_RCC_OscConfig (&RCC_OscInitStruct);
174+ if (HAL_RCC_OscConfig (&RCC_OscInitStruct) != HAL_OK) {
175+ _Error_Handler (__FILE__, __LINE__);
176+ }
165177
166178 /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
167- clocks dividers */
168- RCC_ClkInitStruct.ClockType = ( RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
169- RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2) ;
179+ clocks dividers */
180+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
181+ RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
170182 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
171183 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
172184 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
173185 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
174- HAL_RCC_ClockConfig (&RCC_ClkInitStruct, FLASH_LATENCY_5);
175186
176- /* STM32F405x/407x/415x/417x Revision Z devices: prefetch is supported */
177- if (HAL_GetREVID () == 0x1001 ) {
178- /* Enable the Flash prefetch */
179- __HAL_FLASH_PREFETCH_BUFFER_ENABLE ();
187+ if (HAL_RCC_ClockConfig (&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
188+ _Error_Handler (__FILE__, __LINE__);
180189 }
190+
191+ /* Ensure CCM RAM clock is enabled */
192+ __HAL_RCC_CCMDATARAMEN_CLK_ENABLE ();
181193}
182194
183195#ifdef __cplusplus
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