Skip to content

Commit ce23bcd

Browse files
Nathan Seidlenseidle
Nathan Seidle
authored and
nseidle
committed
VSC whitespace changes
1 parent 269de5c commit ce23bcd

File tree

1 file changed

+54
-41
lines changed

1 file changed

+54
-41
lines changed

‎cores/arduino/ard_sup/analog/ap3_analog.cpp

+54-41
Original file line numberDiff line numberDiff line change
@@ -121,15 +121,16 @@ static const uint8_t outcfg_tbl[32][4] =
121121

122122
#define AP3_MAX_ANALOG_WRITE_WIDTH 0x0000FFFF
123123

124-
uint16_t _analogBits = 10; //10-bit by default
125-
uint8_t _analogWriteBits = 8; // 8-bit by default for writes
126-
uint8_t _servoWriteBits = 8; // 8-bit by default for writes
124+
uint16_t _analogBits = 10; //10-bit by default
125+
uint8_t _analogWriteBits = 8; // 8-bit by default for writes
126+
uint8_t _servoWriteBits = 8; // 8-bit by default for writes
127127
static bool ap3_adc_initialized = false; // flag to show if the ADC has been initialized
128128
static uint32_t _analogWriteWidth = 0x0000FFFF;
129129

130130
uint16_t analogRead(uint8_t pinNumber)
131131
{
132-
if(!ap3_adc_initialized){
132+
if (!ap3_adc_initialized)
133+
{
133134
ap3_adc_setup();
134135
ap3_adc_initialized = true;
135136
}
@@ -508,19 +509,21 @@ ap3_err_t ap3_pwm_output(uint8_t pin, uint32_t th, uint32_t fw, uint32_t clk)
508509

509510
// if timer is running wait for timer value to roll over (will indicate that at least one pulse has been emitted)
510511
AM_CRITICAL_BEGIN // critical section when reading / writing config registers
511-
if(*((uint32_t*)CTIMERADDRn(CTIMER, timer, CTRL0)) & (CTIMER_CTRL0_TMRA0EN_Msk | CTIMER_CTRL0_TMRB0EN_Msk)){
512+
if (*((uint32_t *)CTIMERADDRn(CTIMER, timer, CTRL0)) & (CTIMER_CTRL0_TMRA0EN_Msk | CTIMER_CTRL0_TMRB0EN_Msk))
513+
{
512514
uint32_t current = 0;
513515
uint32_t last = 0;
514-
do {
516+
do
517+
{
515518
last = current;
516-
current = am_hal_ctimer_read( timer, segment);
517-
}while(current >= last);
519+
current = am_hal_ctimer_read(timer, segment);
520+
} while (current >= last);
518521
}
519522

520523
AM_CRITICAL_END // end critical section
521524

522-
// clear timer (also stops the timer)
523-
am_hal_ctimer_clear(timer, segment);
525+
// clear timer (also stops the timer)
526+
am_hal_ctimer_clear(timer, segment);
524527

525528
// Configure the repeated pulse mode with our clock source
526529
am_hal_ctimer_config_single(timer,
@@ -538,25 +541,27 @@ ap3_err_t ap3_pwm_output(uint8_t pin, uint32_t th, uint32_t fw, uint32_t clk)
538541
pui32ConfigReg = (uint32_t *)CTIMERADDRn(CTIMER, timer, AUX0);
539542
uint32_t ui32WriteVal = AM_REGVAL(pui32ConfigReg);
540543
uint32_t ui32ConfigVal = (1 << CTIMER_AUX0_TMRA0EN23_Pos); // using CTIMER_AUX0_TMRA0EN23_Pos because for now this number is common to all CTimer instances
541-
volatile uint32_t *pui32CompareRegA = (uint32_t*)CTIMERADDRn(CTIMER, timer, CMPRA0);
542-
volatile uint32_t *pui32CompareRegB = (uint32_t*)CTIMERADDRn(CTIMER, timer, CMPRB0);
543-
uint32_t masterPeriod = (uint32_t)(*(pui32CompareRegA) & CTIMER_CMPRA0_CMPR1A0_Msk) >> CTIMER_CMPRA0_CMPR1A0_Pos;
544-
uint32_t masterRisingTrigger = (uint32_t)(*(pui32CompareRegA) & CTIMER_CMPRA0_CMPR0A0_Msk) >> CTIMER_CMPRA0_CMPR0A0_Pos;
545-
544+
volatile uint32_t *pui32CompareRegA = (uint32_t *)CTIMERADDRn(CTIMER, timer, CMPRA0);
545+
volatile uint32_t *pui32CompareRegB = (uint32_t *)CTIMERADDRn(CTIMER, timer, CMPRB0);
546+
uint32_t masterPeriod = (uint32_t)(*(pui32CompareRegA)&CTIMER_CMPRA0_CMPR1A0_Msk) >> CTIMER_CMPRA0_CMPR1A0_Pos;
547+
uint32_t masterRisingTrigger = (uint32_t)(*(pui32CompareRegA)&CTIMER_CMPRA0_CMPR0A0_Msk) >> CTIMER_CMPRA0_CMPR0A0_Pos;
548+
546549
if (segment == AM_HAL_CTIMER_TIMERB)
547550
{
548551
ui32ConfigVal = ((ui32ConfigVal & 0xFFFF) << 16);
549-
masterPeriod = (uint32_t)(*(pui32CompareRegB) & CTIMER_CMPRB0_CMPR1B0_Msk) >> CTIMER_CMPRB0_CMPR1B0_Pos;
550-
masterRisingTrigger = (uint32_t)(*(pui32CompareRegA) & CTIMER_CMPRB0_CMPR0B0_Msk) >> CTIMER_CMPRB0_CMPR0B0_Pos;
552+
masterPeriod = (uint32_t)(*(pui32CompareRegB)&CTIMER_CMPRB0_CMPR1B0_Msk) >> CTIMER_CMPRB0_CMPR1B0_Pos;
553+
masterRisingTrigger = (uint32_t)(*(pui32CompareRegA)&CTIMER_CMPRB0_CMPR0B0_Msk) >> CTIMER_CMPRB0_CMPR0B0_Pos;
551554
}
552555
ui32WriteVal |= ui32ConfigVal;
553556
AM_REGVAL(pui32ConfigReg) = ui32WriteVal;
554557

555-
if(masterPeriod != fw){
558+
if (masterPeriod != fw)
559+
{
556560
// the master output fw dictates the secondary fw... so if they are different try to change the master while preserving duty cycle
557561
uint32_t masterTH = ((masterPeriod - masterRisingTrigger) * fw) / masterPeriod; // try to compensate in case _analogWriteWidth was changed
558-
if(masterPeriod == 0){ // if masterPeriod was 0 then masterTH will be invalid (divide by 0). This usually means that the master timer output did not have a set duty cycle. This also means the output is probably not configured and so it is okay to choose an arbitrary duty cycle
559-
masterTH = fw - 1;
562+
if (masterPeriod == 0)
563+
{ // if masterPeriod was 0 then masterTH will be invalid (divide by 0). This usually means that the master timer output did not have a set duty cycle. This also means the output is probably not configured and so it is okay to choose an arbitrary duty cycle
564+
masterTH = fw - 1;
560565
}
561566
am_hal_ctimer_period_set(timer, segment, fw, masterTH); // but this overwrites the non-aux compare regs for this timer / segment
562567
// Serial.printf("th = %d, fw = %d, (masterPeriod - masterRisingTrigger) = (%d - %d) = %d\n", th, fw, masterPeriod, masterRisingTrigger, (masterPeriod - masterRisingTrigger));
@@ -570,25 +575,28 @@ ap3_err_t ap3_pwm_output(uint8_t pin, uint32_t th, uint32_t fw, uint32_t clk)
570575
// Try to preserve settings of the secondary output
571576
uint32_t *pui32ConfigReg = NULL;
572577
pui32ConfigReg = (uint32_t *)CTIMERADDRn(CTIMER, timer, AUX0);
573-
volatile uint32_t *pui32CompareRegA = (uint32_t*)CTIMERADDRn(CTIMER, timer, CMPRAUXA0);
574-
volatile uint32_t *pui32CompareRegB = (uint32_t*)CTIMERADDRn(CTIMER, timer, CMPRAUXB0);
575-
uint32_t slavePeriod = (uint32_t)(*(pui32CompareRegA) & CTIMER_CMPRA0_CMPR1A0_Msk) >> CTIMER_CMPRA0_CMPR1A0_Pos;
576-
uint32_t slaveRisingTrigger = (uint32_t)(*(pui32CompareRegA) & CTIMER_CMPRA0_CMPR0A0_Msk) >> CTIMER_CMPRA0_CMPR0A0_Pos;
577-
578+
volatile uint32_t *pui32CompareRegA = (uint32_t *)CTIMERADDRn(CTIMER, timer, CMPRAUXA0);
579+
volatile uint32_t *pui32CompareRegB = (uint32_t *)CTIMERADDRn(CTIMER, timer, CMPRAUXB0);
580+
uint32_t slavePeriod = (uint32_t)(*(pui32CompareRegA)&CTIMER_CMPRA0_CMPR1A0_Msk) >> CTIMER_CMPRA0_CMPR1A0_Pos;
581+
uint32_t slaveRisingTrigger = (uint32_t)(*(pui32CompareRegA)&CTIMER_CMPRA0_CMPR0A0_Msk) >> CTIMER_CMPRA0_CMPR0A0_Pos;
582+
578583
uint32_t auxEnabled = (AM_REGVAL(pui32ConfigReg) & CTIMER_AUX0_TMRA0EN23_Msk);
579-
584+
580585
if (segment == AM_HAL_CTIMER_TIMERB)
581586
{
582587
auxEnabled = (AM_REGVAL(pui32ConfigReg) & (CTIMER_AUX0_TMRA0EN23_Msk << 16));
583-
slavePeriod = (uint32_t)(*(pui32CompareRegB) & CTIMER_CMPRB0_CMPR1B0_Msk) >> CTIMER_CMPRB0_CMPR1B0_Pos;
584-
slaveRisingTrigger = (uint32_t)(*(pui32CompareRegA) & CTIMER_CMPRB0_CMPR0B0_Msk) >> CTIMER_CMPRB0_CMPR0B0_Pos;
588+
slavePeriod = (uint32_t)(*(pui32CompareRegB)&CTIMER_CMPRB0_CMPR1B0_Msk) >> CTIMER_CMPRB0_CMPR1B0_Pos;
589+
slaveRisingTrigger = (uint32_t)(*(pui32CompareRegA)&CTIMER_CMPRB0_CMPR0B0_Msk) >> CTIMER_CMPRB0_CMPR0B0_Pos;
585590
}
586591

587-
if( auxEnabled ){ // if secondary outputs are enabled
588-
if( slavePeriod != fw ){ // and if fw is different from previous slavePeriod
592+
if (auxEnabled)
593+
{ // if secondary outputs are enabled
594+
if (slavePeriod != fw)
595+
{ // and if fw is different from previous slavePeriod
589596
uint32_t slaveTH = ((slavePeriod - slaveRisingTrigger) * fw) / slavePeriod; // try to compensate in case _analogWriteWidth was changed
590-
if(slavePeriod == 0){ // if masterPeriod was 0 then masterTH will be invalid (divide by 0). This usually means that the master timer output did not have a set duty cycle. This also means the output is probably not configured and so it is okay to choose an arbitrary duty cycle
591-
slaveTH = fw - 1;
597+
if (slavePeriod == 0)
598+
{ // if masterPeriod was 0 then masterTH will be invalid (divide by 0). This usually means that the master timer output did not have a set duty cycle. This also means the output is probably not configured and so it is okay to choose an arbitrary duty cycle
599+
slaveTH = fw - 1;
592600
}
593601
am_hal_ctimer_aux_period_set(timer, segment, fw, slaveTH); // but this overwrites the non-aux compare regs for this timer / segment
594602
}
@@ -615,20 +623,25 @@ ap3_err_t analogWriteResolution(uint8_t res)
615623
return AP3_OK;
616624
}
617625

618-
ap3_err_t analogWriteFrameWidth(uint32_t fw){
626+
ap3_err_t analogWriteFrameWidth(uint32_t fw)
627+
{
619628
_analogWriteWidth = fw;
620-
if(_analogWriteWidth > AP3_MAX_ANALOG_WRITE_WIDTH){
629+
if (_analogWriteWidth > AP3_MAX_ANALOG_WRITE_WIDTH)
630+
{
621631
_analogWriteWidth = AP3_MAX_ANALOG_WRITE_WIDTH;
622632
}
623633
return AP3_OK;
624634
}
625635

626-
ap3_err_t analogWriteFrequency(float freq){
636+
ap3_err_t analogWriteFrequency(float freq)
637+
{
627638
_analogWriteWidth = (uint32_t)(12000000 / freq);
628-
if(_analogWriteWidth > AP3_MAX_ANALOG_WRITE_WIDTH){
639+
if (_analogWriteWidth > AP3_MAX_ANALOG_WRITE_WIDTH)
640+
{
629641
return AP3_ERR;
630642
}
631-
if(_analogWriteWidth < 3){
643+
if (_analogWriteWidth < 3)
644+
{
632645
return AP3_ERR;
633646
}
634647
return AP3_OK;
@@ -655,12 +668,12 @@ ap3_err_t servoWriteResolution(uint8_t res)
655668

656669
uint8_t getServoResolution()
657670
{
658-
return(_servoWriteBits);
671+
return (_servoWriteBits);
659672
}
660673

661674
ap3_err_t servoWrite(uint8_t pin, uint32_t val)
662675
{
663-
return(servoWrite(pin, val, 544, 2400)); //Call servoWrite with Arduino default min/max microseconds. See: https://www.arduino.cc/en/Reference/ServoAttach
676+
return (servoWrite(pin, val, 544, 2400)); //Call servoWrite with Arduino default min/max microseconds. See: https://www.arduino.cc/en/Reference/ServoAttach
664677
}
665678

666679
ap3_err_t servoWrite(uint8_t pin, uint32_t val, uint16_t minMicros, uint16_t maxMicros)
@@ -672,9 +685,9 @@ ap3_err_t servoWrite(uint8_t pin, uint32_t val, uint16_t minMicros, uint16_t max
672685
uint32_t fw = 60000; // 20 ms wide frame
673686

674687
//Convert microSeconds to PWM counts.
675-
uint32_t min = minMicros * 3;
688+
uint32_t min = minMicros * 3;
676689
uint32_t max = maxMicros * 3;
677-
690+
678691
uint32_t th = (uint32_t)(((max - min) * val) / fsv) + min;
679692

680693
return ap3_pwm_output(pin, th, fw, clk);

0 commit comments

Comments
 (0)