diff --git a/boards.txt b/boards.txt
index 4711eb15167..6ac1a2cae20 100644
--- a/boards.txt
+++ b/boards.txt
@@ -39125,6 +39125,198 @@ Geekble_ESP32C3.menu.EraseFlash.none.upload.erase_cmd=
Geekble_ESP32C3.menu.EraseFlash.all=Enabled
Geekble_ESP32C3.menu.EraseFlash.all.upload.erase_cmd=-e
+##############################################################
+
+waveshare_esp32_s3_zero.name=Waveshare ESP32-S3-Zero
+waveshare_esp32_s3_zero.vid.0=0x303a
+waveshare_esp32_s3_zero.pid.0=0x822B
+waveshare_esp32_s3_zero.upload_port.0.vid=0x303a
+waveshare_esp32_s3_zero.upload_port.0.pid=0x822B
+
+waveshare_esp32_s3_zero.bootloader.tool=esptool_py
+waveshare_esp32_s3_zero.bootloader.tool.default=esptool_py
+
+waveshare_esp32_s3_zero.upload.tool=esptool_py
+waveshare_esp32_s3_zero.upload.tool.default=esptool_py
+waveshare_esp32_s3_zero.upload.tool.network=esp_ota
+
+waveshare_esp32_s3_zero.upload.maximum_size=1310720
+
+waveshare_esp32_s3_zero.upload.maximum_data_size=327680
+waveshare_esp32_s3_zero.upload.flags=
+waveshare_esp32_s3_zero.upload.extra_flags=
+waveshare_esp32_s3_zero.upload.use_1200bps_touch=false
+waveshare_esp32_s3_zero.upload.wait_for_upload_port=false
+
+waveshare_esp32_s3_zero.serial.disableDTR=false
+waveshare_esp32_s3_zero.serial.disableRTS=false
+
+waveshare_esp32_s3_zero.build.tarch=xtensa
+waveshare_esp32_s3_zero.build.bootloader_addr=0x0
+waveshare_esp32_s3_zero.build.target=esp32s3
+waveshare_esp32_s3_zero.build.mcu=esp32s3
+waveshare_esp32_s3_zero.build.core=esp32
+waveshare_esp32_s3_zero.build.variant=waveshare_esp32_s3_zero
+waveshare_esp32_s3_zero.build.board=WAVESHARE_ESP32_S3_ZERO
+
+waveshare_esp32_s3_zero.build.usb_mode=1
+waveshare_esp32_s3_zero.build.cdc_on_boot=0
+waveshare_esp32_s3_zero.build.msc_on_boot=0
+waveshare_esp32_s3_zero.build.dfu_on_boot=0
+waveshare_esp32_s3_zero.build.f_cpu=240000000L
+waveshare_esp32_s3_zero.build.flash_size=4MB
+waveshare_esp32_s3_zero.build.flash_freq=80m
+waveshare_esp32_s3_zero.build.flash_mode=dio
+waveshare_esp32_s3_zero.build.boot=qio
+waveshare_esp32_s3_zero.build.boot_freq=80m
+waveshare_esp32_s3_zero.build.partitions=default
+waveshare_esp32_s3_zero.build.defines=
+waveshare_esp32_s3_zero.build.loop_core=
+waveshare_esp32_s3_zero.build.event_core=
+waveshare_esp32_s3_zero.build.psram_type=qspi
+waveshare_esp32_s3_zero.build.memory_type={build.boot}_{build.psram_type}
+
+waveshare_esp32_s3_zero.menu.PSRAM.disabled=Disabled
+waveshare_esp32_s3_zero.menu.PSRAM.disabled.build.defines=
+waveshare_esp32_s3_zero.menu.PSRAM.disabled.build.psram_type=qspi
+waveshare_esp32_s3_zero.menu.PSRAM.enabled=Enabled
+waveshare_esp32_s3_zero.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
+waveshare_esp32_s3_zero.menu.PSRAM.enabled.build.psram_type=qspi
+
+waveshare_esp32_s3_zero.menu.FlashMode.qio=QIO 80MHz
+waveshare_esp32_s3_zero.menu.FlashMode.qio.build.flash_mode=dio
+waveshare_esp32_s3_zero.menu.FlashMode.qio.build.boot=qio
+waveshare_esp32_s3_zero.menu.FlashMode.qio.build.boot_freq=80m
+waveshare_esp32_s3_zero.menu.FlashMode.qio.build.flash_freq=80m
+waveshare_esp32_s3_zero.menu.FlashMode.qio120=QIO 120MHz
+waveshare_esp32_s3_zero.menu.FlashMode.qio120.build.flash_mode=dio
+waveshare_esp32_s3_zero.menu.FlashMode.qio120.build.boot=qio
+waveshare_esp32_s3_zero.menu.FlashMode.qio120.build.boot_freq=120m
+waveshare_esp32_s3_zero.menu.FlashMode.qio120.build.flash_freq=80m
+
+waveshare_esp32_s3_zero.menu.LoopCore.1=Core 1
+waveshare_esp32_s3_zero.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
+waveshare_esp32_s3_zero.menu.LoopCore.0=Core 0
+waveshare_esp32_s3_zero.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
+
+waveshare_esp32_s3_zero.menu.EventsCore.1=Core 1
+waveshare_esp32_s3_zero.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
+waveshare_esp32_s3_zero.menu.EventsCore.0=Core 0
+waveshare_esp32_s3_zero.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
+
+waveshare_esp32_s3_zero.menu.USBMode.hwcdc=Hardware CDC and JTAG
+waveshare_esp32_s3_zero.menu.USBMode.hwcdc.build.usb_mode=1
+waveshare_esp32_s3_zero.menu.USBMode.default=USB-OTG (TinyUSB)
+waveshare_esp32_s3_zero.menu.USBMode.default.build.usb_mode=0
+
+waveshare_esp32_s3_zero.menu.CDCOnBoot.default=Disabled
+waveshare_esp32_s3_zero.menu.CDCOnBoot.default.build.cdc_on_boot=0
+waveshare_esp32_s3_zero.menu.CDCOnBoot.cdc=Enabled
+waveshare_esp32_s3_zero.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
+
+waveshare_esp32_s3_zero.menu.MSCOnBoot.default=Disabled
+waveshare_esp32_s3_zero.menu.MSCOnBoot.default.build.msc_on_boot=0
+waveshare_esp32_s3_zero.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
+waveshare_esp32_s3_zero.menu.MSCOnBoot.msc.build.msc_on_boot=1
+
+waveshare_esp32_s3_zero.menu.DFUOnBoot.default=Disabled
+waveshare_esp32_s3_zero.menu.DFUOnBoot.default.build.dfu_on_boot=0
+waveshare_esp32_s3_zero.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
+waveshare_esp32_s3_zero.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
+
+waveshare_esp32_s3_zero.menu.UploadMode.default=UART0 / Hardware CDC
+waveshare_esp32_s3_zero.menu.UploadMode.default.upload.use_1200bps_touch=false
+waveshare_esp32_s3_zero.menu.UploadMode.default.upload.wait_for_upload_port=false
+waveshare_esp32_s3_zero.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
+waveshare_esp32_s3_zero.menu.UploadMode.cdc.upload.use_1200bps_touch=true
+waveshare_esp32_s3_zero.menu.UploadMode.cdc.upload.wait_for_upload_port=true
+
+waveshare_esp32_s3_zero.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+waveshare_esp32_s3_zero.menu.PartitionScheme.default.build.partitions=default
+waveshare_esp32_s3_zero.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+waveshare_esp32_s3_zero.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+waveshare_esp32_s3_zero.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+waveshare_esp32_s3_zero.menu.PartitionScheme.no_ota.build.partitions=no_ota
+waveshare_esp32_s3_zero.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+waveshare_esp32_s3_zero.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+waveshare_esp32_s3_zero.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+waveshare_esp32_s3_zero.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+waveshare_esp32_s3_zero.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+waveshare_esp32_s3_zero.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+waveshare_esp32_s3_zero.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+waveshare_esp32_s3_zero.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+waveshare_esp32_s3_zero.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+waveshare_esp32_s3_zero.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+waveshare_esp32_s3_zero.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+waveshare_esp32_s3_zero.menu.PartitionScheme.huge_app.build.partitions=huge_app
+waveshare_esp32_s3_zero.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+waveshare_esp32_s3_zero.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+waveshare_esp32_s3_zero.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+waveshare_esp32_s3_zero.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+waveshare_esp32_s3_zero.menu.PartitionScheme.rainmaker=RainMaker 4MB
+waveshare_esp32_s3_zero.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
+waveshare_esp32_s3_zero.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080
+waveshare_esp32_s3_zero.menu.PartitionScheme.rainmaker_4MB=RainMaker 4MB No OTA
+waveshare_esp32_s3_zero.menu.PartitionScheme.rainmaker_4MB.build.partitions=rainmaker_4MB_no_ota
+waveshare_esp32_s3_zero.menu.PartitionScheme.rainmaker_4MB.upload.maximum_size=4038656
+
+waveshare_esp32_s3_zero.menu.PartitionScheme.otanofs=OTA no FS (2MB APP with OTA)
+waveshare_esp32_s3_zero.menu.PartitionScheme.otanofs.build.custom_partitions=ota_nofs_4MB
+waveshare_esp32_s3_zero.menu.PartitionScheme.otanofs.upload.maximum_size=2031616
+waveshare_esp32_s3_zero.menu.PartitionScheme.all_app=Max APP (4MB APP no OTA)
+waveshare_esp32_s3_zero.menu.PartitionScheme.all_app.build.custom_partitions=max_app_4MB
+waveshare_esp32_s3_zero.menu.PartitionScheme.all_app.upload.maximum_size=4063232
+
+waveshare_esp32_s3_zero.menu.PartitionScheme.custom=Custom
+waveshare_esp32_s3_zero.menu.PartitionScheme.custom.build.partitions=
+waveshare_esp32_s3_zero.menu.PartitionScheme.custom.upload.maximum_size=16777216
+
+waveshare_esp32_s3_zero.menu.CPUFreq.240=240MHz (WiFi)
+waveshare_esp32_s3_zero.menu.CPUFreq.240.build.f_cpu=240000000L
+waveshare_esp32_s3_zero.menu.CPUFreq.160=160MHz (WiFi)
+waveshare_esp32_s3_zero.menu.CPUFreq.160.build.f_cpu=160000000L
+waveshare_esp32_s3_zero.menu.CPUFreq.80=80MHz (WiFi)
+waveshare_esp32_s3_zero.menu.CPUFreq.80.build.f_cpu=80000000L
+waveshare_esp32_s3_zero.menu.CPUFreq.40=40MHz
+waveshare_esp32_s3_zero.menu.CPUFreq.40.build.f_cpu=40000000L
+waveshare_esp32_s3_zero.menu.CPUFreq.20=20MHz
+waveshare_esp32_s3_zero.menu.CPUFreq.20.build.f_cpu=20000000L
+waveshare_esp32_s3_zero.menu.CPUFreq.10=10MHz
+waveshare_esp32_s3_zero.menu.CPUFreq.10.build.f_cpu=10000000L
+
+waveshare_esp32_s3_zero.menu.UploadSpeed.921600=921600
+waveshare_esp32_s3_zero.menu.UploadSpeed.921600.upload.speed=921600
+waveshare_esp32_s3_zero.menu.UploadSpeed.115200=115200
+waveshare_esp32_s3_zero.menu.UploadSpeed.115200.upload.speed=115200
+waveshare_esp32_s3_zero.menu.UploadSpeed.256000.windows=256000
+waveshare_esp32_s3_zero.menu.UploadSpeed.256000.upload.speed=256000
+waveshare_esp32_s3_zero.menu.UploadSpeed.230400.windows.upload.speed=256000
+waveshare_esp32_s3_zero.menu.UploadSpeed.230400=230400
+waveshare_esp32_s3_zero.menu.UploadSpeed.230400.upload.speed=230400
+waveshare_esp32_s3_zero.menu.UploadSpeed.460800.linux=460800
+waveshare_esp32_s3_zero.menu.UploadSpeed.460800.macosx=460800
+waveshare_esp32_s3_zero.menu.UploadSpeed.460800.upload.speed=460800
+waveshare_esp32_s3_zero.menu.UploadSpeed.512000.windows=512000
+waveshare_esp32_s3_zero.menu.UploadSpeed.512000.upload.speed=512000
+
+waveshare_esp32_s3_zero.menu.DebugLevel.none=None
+waveshare_esp32_s3_zero.menu.DebugLevel.none.build.code_debug=0
+waveshare_esp32_s3_zero.menu.DebugLevel.error=Error
+waveshare_esp32_s3_zero.menu.DebugLevel.error.build.code_debug=1
+waveshare_esp32_s3_zero.menu.DebugLevel.warn=Warn
+waveshare_esp32_s3_zero.menu.DebugLevel.warn.build.code_debug=2
+waveshare_esp32_s3_zero.menu.DebugLevel.info=Info
+waveshare_esp32_s3_zero.menu.DebugLevel.info.build.code_debug=3
+waveshare_esp32_s3_zero.menu.DebugLevel.debug=Debug
+waveshare_esp32_s3_zero.menu.DebugLevel.debug.build.code_debug=4
+waveshare_esp32_s3_zero.menu.DebugLevel.verbose=Verbose
+waveshare_esp32_s3_zero.menu.DebugLevel.verbose.build.code_debug=5
+
+waveshare_esp32_s3_zero.menu.EraseFlash.none=Disabled
+waveshare_esp32_s3_zero.menu.EraseFlash.none.upload.erase_cmd=
+waveshare_esp32_s3_zero.menu.EraseFlash.all=Enabled
+waveshare_esp32_s3_zero.menu.EraseFlash.all.upload.erase_cmd=-e
+
######################################################
ws_esp32_s3_matrix.name=Waveshare ESP32-S3-Matrix
diff --git a/tools/partitions/max_app_4MB.csv b/tools/partitions/max_app_4MB.csv
new file mode 100644
index 00000000000..ec30c10065b
--- /dev/null
+++ b/tools/partitions/max_app_4MB.csv
@@ -0,0 +1,5 @@
+# Name, Type, SubType, Offset, Size, Flags
+nvs, data, nvs, 0x9000, 0x5000,
+otadata, data, ota, 0xe000, 0x2000,
+app0, app, factory, 0x10000, 0x3E0000,
+coredump, data, coredump,0x3F0000,0x10000,
diff --git a/tools/partitions/ota_nofs_4MB.csv b/tools/partitions/ota_nofs_4MB.csv
new file mode 100644
index 00000000000..04240badb49
--- /dev/null
+++ b/tools/partitions/ota_nofs_4MB.csv
@@ -0,0 +1,6 @@
+# Name, Type, SubType, Offset, Size, Flags
+ nvs, data, nvs, 0x9000, 0x5000,
+ otadata, data, ota, 0xE000, 0x2000,
+ app0, app, ota_0, 0x10000, 0x1F0000,
+ app1, app, ota_1, 0x200000, 0x1F0000,
+coredump, data, coredump, 0x3F0000, 0x10000,
diff --git a/variants/waveshare_esp32_s3_zero/pins_arduino.h b/variants/waveshare_esp32_s3_zero/pins_arduino.h
new file mode 100644
index 00000000000..0d73bee16d0
--- /dev/null
+++ b/variants/waveshare_esp32_s3_zero/pins_arduino.h
@@ -0,0 +1,81 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define USB_VID 0x303a
+#define USB_PID 0x822B
+#define USB_MANUFACTURER "Waveshare"
+#define USB_PRODUCT "ESP32-S3-Zero"
+#define USB_SERIAL "" // Empty string for MAC address
+
+// Partial voltage measurement method
+#define WS_RGB 21
+
+// Mapping based on the ESP32S3 data sheet - alternate for OUTPUT
+static const uint8_t OUTPUT_IO1 = 1;
+static const uint8_t OUTPUT_IO2 = 2;
+static const uint8_t OUTPUT_IO3 = 3;
+static const uint8_t OUTPUT_IO4 = 4;
+static const uint8_t OUTPUT_IO5 = 5;
+static const uint8_t OUTPUT_IO6 = 6;
+static const uint8_t OUTPUT_IO7 = 7;
+static const uint8_t OUTPUT_IO8 = 8;
+static const uint8_t OUTPUT_IO9 = 9;
+static const uint8_t OUTPUT_IO10 = 10;
+static const uint8_t OUTPUT_IO11 = 11;
+static const uint8_t OUTPUT_IO12 = 12;
+static const uint8_t OUTPUT_IO13 = 13;
+
+// Def for I2C that shares the IMU I2C pins
+static const uint8_t SDA = -1;
+static const uint8_t SCL = -1;
+
+// Mapping based on the ESP32S3 data sheet - alternate for SPI2
+static const uint8_t SS = 34; // FSPICS0
+static const uint8_t MOSI = 35; // FSPID
+static const uint8_t MISO = 37; // FSPIQ
+static const uint8_t SCK = 36; // FSPICLK
+
+// UART0 pins
+static const uint8_t TX = 43;
+static const uint8_t RX = 44;
+
+// Analog capable pins on the header
+static const uint8_t A0 = 1;
+static const uint8_t A1 = 2;
+static const uint8_t A2 = 3;
+static const uint8_t A3 = 4;
+static const uint8_t A4 = 5;
+static const uint8_t A5 = 6;
+static const uint8_t A6 = 7;
+
+// GPIO capable pins on the header
+static const uint8_t D0 = 7;
+static const uint8_t D1 = 6;
+static const uint8_t D2 = 5;
+static const uint8_t D3 = 4;
+static const uint8_t D4 = 3;
+static const uint8_t D5 = 2;
+static const uint8_t D6 = 1;
+static const uint8_t D7 = 44;
+static const uint8_t D8 = 43;
+static const uint8_t D9 = 40;
+static const uint8_t D10 = 39;
+static const uint8_t D11 = 38;
+static const uint8_t D12 = 37;
+static const uint8_t D13 = 36;
+static const uint8_t D14 = 35;
+static const uint8_t D15 = 34;
+static const uint8_t D16 = 33;
+
+// Touch input capable pins on the header
+static const uint8_t T1 = 1;
+static const uint8_t T2 = 2;
+static const uint8_t T3 = 3;
+static const uint8_t T4 = 4;
+static const uint8_t T5 = 5;
+static const uint8_t T6 = 6;
+static const uint8_t T7 = 7;
+
+#endif /* Pins_Arduino_h */