Merge pull request #52 from facchinm/emulate_16u2_dtr

[MuxTO] Reset 4809 on baudrate change / port open

Author: facchinm

firmwares/MuxTO/JTAG2.h

@@ -38,9 +38,9 @@ enum baud_rate {
 // *** Parameter Values ***
 constexpr uint8_t PARAM_HW_VER_M_VAL			= 0x01;
 constexpr uint8_t PARAM_HW_VER_S_VAL			= 0x01;
-constexpr uint8_t PARAM_FW_VER_M_MIN_VAL		= 0x00;
-constexpr uint8_t PARAM_FW_VER_M_MAJ_VAL		= 0x06;
-constexpr uint8_t PARAM_FW_VER_S_MIN_VAL		= 0x00;
+constexpr uint8_t PARAM_FW_VER_M_MIN_VAL		= 0x07;
+constexpr uint8_t PARAM_FW_VER_M_MAJ_VAL		= 0x01;
+constexpr uint8_t PARAM_FW_VER_S_MIN_VAL		= 0x07;
 constexpr uint8_t PARAM_FW_VER_S_MAJ_VAL		= 0x06;
 extern uint8_t PARAM_EMU_MODE_VAL;
 extern baud_rate PARAM_BAUD_RATE_VAL;

firmwares/MuxTO/MuxTO.bin

@@ -17,9 +17,11 @@
 
 // Includes
 #include "sys.h"
+#include "lock.h"
 #include "updi_io.h"
 #include "JICE_io.h"
 #include "JTAG2.h"
+#include "UPDI_hi_lvl.h"
 
 volatile bool updi_mode = false;
 unsigned long baudrate = 115200;
@@ -28,11 +30,15 @@ unsigned long updi_mode_end = 0;
 uint8_t stopbits = 1;
 uint8_t paritytype = 0;
 uint8_t numbits = 8;
+int8_t dtr = -1;
+int8_t rts = -1;
 uint16_t serial_mode = SERIAL_8N1;
 bool serialNeedReconfiguration = false;
 
 char support_buffer[64];
 
+struct lock q;
+
 void setup() {
   /* Initialize MCU */
   pinMode(LED_BUILTIN, OUTPUT);
@@ -41,6 +47,8 @@ void setup() {
   JICE_io::init();
   UPDI_io::init();
   Serial1.begin(baudrate, serial_mode);
+  lock_init(&q);
+  JTAG2::sign_on();
 }
 
 //#define DEBUG;
@@ -62,17 +70,21 @@ void loop() {
     //blink_delay = 1000;
 
     if (int c = Serial1.available()) {
+      lock(&q);
       if (c > Serial.availableForWrite()) {
         c = Serial.availableForWrite();
       }
+      unlock(&q);
       Serial1.readBytes(support_buffer, c);
       Serial.write(support_buffer, c);
     }
 
     if (int c = Serial.available()) {
+      lock(&q);
       if (c > Serial1.availableForWrite()) {
         c = Serial1.availableForWrite();
       }
+      unlock(&q);
       Serial.readBytes(support_buffer, c);
       Serial1.write(support_buffer, c);
     }
@@ -133,13 +145,18 @@ void loop() {
       updi_mode_end = 0;
     }
 
-    if (Serial.baud() != baudrate || serialNeedReconfiguration) {
+    if (Serial.baud() != baudrate || serialNeedReconfiguration || Serial.dtr() != dtr) {
+      dtr = Serial.dtr();
       if (Serial.dtr() == 1) {
         baudrate = Serial.baud();
         Serial1.end();
         if (baudrate != 1200) {
           Serial1.begin(baudrate, serial_mode);
           serialNeedReconfiguration = false;
+          // Request reset
+          UPDI::stcs(UPDI::reg::ASI_Reset_Request, UPDI::RESET_ON);
+          // Release reset (System remains in reset state until released)
+          UPDI::stcs(UPDI::reg::ASI_Reset_Request, UPDI::RESET_OFF);
         }
       }
     }

firmwares/MuxTO/MuxTO.hex

@@ -0,0 +1,38 @@
+#ifndef _ARCH_LOCK_H_
+#define _ARCH_LOCK_H_
+
+struct lock {
+  uint32_t primask;
+};
+
+#define LOCK_INIT (struct lock) {}
+
+static inline void lock_init(struct lock *lock)
+{
+}
+
+// source:
+// http://embeddedfreak.wordpress.com/2009/08/14/cortex-m3-global-interruptexception-control/
+//
+// confirm this is correct by printing primask before after
+
+// note arm architecture v7m rm... setting PRIMASK raises priority to 0
+
+static inline void lock(struct lock *lock)
+{
+  uint32_t tmp;
+  asm volatile (
+    "mrs  %0, PRIMASK\n\t"
+    "cpsid  i\n\t"
+    : "=r" (tmp) );
+  lock->primask = tmp;
+}
+
+static inline void unlock(struct lock *lock)
+{
+  asm volatile (
+    "msr  PRIMASK, %0\n\t"
+    : : "r" (lock->primask) );
+}
+
+#endif